The use of very high density, separable, mechanical IC wiring substrates is becoming important as a method of achieving a bumpless interconnect in a semiconductor device and as a method of achieving unpackaged test and burn-in of semiconductor dice or wafers. A conventional method for mounting a semiconductor die on a substrate by means of wireless bonding includes a method in which conductive bumps are formed on an active surface of the semiconductor die, and then the bumps are bonded to bonding pads on the substrate. This method is known as flip-chip bonding and is well known in the art. However, flip-chip bonding has disadvantages in that the bumps on the semiconductor die surface must be formed in advance, and alignment accuracy is critical during the bonding step.
A bumpless wiring substrate having an anisotropic conductive film has been disclosed in the art. The anisotropic conductive film is produced by a method in which conductive particles such as carbon black, graphite, nickel, copper, silver, etc. are dispersed in an insulating resin film. The conductive particles contact each other in the direction normal to the film surface when the film is compressed resulting in z-axis conductivity through the film. These films often require heating to permit thermoset polymer film cure, or softening of a thermoplastic film. A drawback to this type of wiring substrate is that the electrical connection is at least semi-permanent, with subsequent separation requiring a heating and mechanical removal step.
Japanese patent 04-363811A discloses a wiring substrate with conductive bumps on both top and bottom surfaces of the substrate. The substrate is composed of a carrier film which has conductive through-holes. The conductive bumps are formed on top of the through-holes, on both sides of the carrier film. One of the problems with this material is that it requires high pressure contact in order to maintain good electrical connections between a semiconductor die and another substrate.
Another problem with wiring substrates in the prior art is that they are not very reliable for connecting surfaces which are not entirely coplanar. The surface of a semiconductor die, for example, is not always coplanar. Furthermore, on the wafer level, variations in surface flatness across a wafer is probable. The pressure needed to maintain contact across the surface of a semiconductor die or wafer and a substrate will necessarily be high. The contacts do not operate mechanically independent from each other. Therefore, heavy compression at one site due to a higher spot on a substrate induces compression in an adjacent intended contact site, which increases the contact resistance or causes an open circuit.